a chipset, connected to the CPU, wherein the CPU communicates with a
peripheral of the computer main board through the chipset;
a clock generator, connected to the chipset, providing the chipset with a
system clock frequency for operating the computer main board, wherein the
CPU controls the clock generator through the chipset, and the clock
generator is controlled through a first control signal bus; and
a reset signal generator, connected to the chipset and controlled by the
CPU through the chipset, which provides the chipset with a reset signal,
wherein the reset signal generator is controlled through a second control
signal bus, such that when the clock generator needs to change the system
clock frequency according to a command from the CPU, the reset signal
generator activates the reset signal simultaneously for changing a clock
frequency of the peripheral from a current frequency to an intended
frequency with respect to the svstem clock frequency where the intended
frequency can be repeatedly reset until the intended frequency matches in
ratio to the system clock frequency and the reset signal remains
activation until the system clock frequency is completely changed to a new
setting.
6. The circuit of claim 5, wherein the circuit further comprises a status
latch for storing a status parameter set by the CPU as soon as the system
clock frequency is changed, wherein the set status parameter is retrieved
by the chipset from the status latch to determine a ratio of the system
clock frequency to a clock frequency of the peripheral after the computer
main board is restarted.
7. The circuit of claim 5, wherein the first control signal bus includes an
I2 C bus.
8. The circuit of claim 7, wherein the second control signal bus includes
an I2 C bus.
9. The circuit of claim 8, wherein the chipset comprises an I2 C bus
interface that is used by the CPU to control the clock generator and the
reset signal generator.
10. A method for switching system clock of a computer main board, the
method comprising:
providing a CPU;
providing a clock generator, for generating a system clock frequency;
sending out a command from the CPU to the clock generator to change the
system clock frequency;
sending out a reset signal from the clock generator as soon as the clock
generator starts to change the system clock frequency wherein the reset
signal resets a clock frequency of a peripheral from a current frequency
to an intended frequency with respect to the system clock frequency where
the intended frequency can be repeatedly reset until the intended
frequency matches in ratio to the system clock frequency, and
canceling the reset signal by the clock generator as soon as the system
clock frequency is changed to a new setting.
11. The method of claim 10, wherein the method further comprises providing
a status latch for storing a status parameter set by the CPU as soon as
the system clock frequency is changed, wherein the set status parameter is
retrieved by the chipset from the status latch to determine a ratio of the
system clock frequency to a clock frequency of the peripheral after the
computer main board is restarted.
12. A method for switching system clock of a computer main board, the
method comprising:
providing a CPU;
providing a clock generator, for generating a system clock frequency;
sending out a command from the CPU to the clock generator to change the
system clock frequency;
sending out a reset signal from a reset signal generator as soon as the
clock generator starts to change the system clock frequency, wherein the
reset signal resets a clock frequency of a peripheral from a current
frequency to an intended frequency with respect to the system clock
frequency where the intended frequency can be repeatedly reset until the
intended frequency matches in ratio to the system clock frequency, and
canceling the reset signal from the reset signal generator as soon as the
system clock frequency is changed to a new setting.
13. The method of claim 12, wherein the method further comprises providing
a status latch for storing a status parameter set by the CPU as soon as
the system clock frequency is changed, wherein the set status parameter is
retrieved by the chipset from the status latch to determine a ratio of the
system clock frequency to a clock frequency of the peripheral after the
computer main board is re
.
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